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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
Rev. 05 -- 5 October 2007 Product data sheet
1. General description
The 74LVC3G14 provides three inverting buffers with Schmitt trigger action. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at the inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
2. Features
I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V 24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Unlimited rise and fall times Multiple package options Specified from -40 C to +85 C and -40 C to +125 C.
I I I I I I I
3. Applications
I Wave and pulse shaper for highly noisy environment I Astable multivibrator I Monostable multivibrator.
NXP Semiconductors
74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
4. Ordering information
Table 1. Ordering information Package Temperature range 74LVC3G14DP 74LVC3G14DC 74LVC3G14GT -40 C to +125 C -40 C to +125 C -40 C to +125 C Name TSSOP8 VSSOP8 XSON8 XQFN8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm Version SOT505-2 SOT765-1 SOT833-1 SOT902-1 Type number
74LVC3G14GM -40 C to +125 C
5. Marking
Table 2. Marking codes Marking code V14 V14 V14 V14 Type number 74LVC3G14DP 74LVC3G14DC 74LVC3G14GT 74LVC3G14GM
6. Functional diagram
1
7
1
1A
1Y
7 6 2
2
3Y
3A
6
3
2A
2Y
5
3
5
A
Y
mna025
mna740
mna741
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one Schmitt trigger)
74LVC3G14_5
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Product data sheet
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NXP Semiconductors
74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
7. Pinning information
7.1 Pinning
74LVC3G14
1A 3Y 2A GND 1 2 3 4
001aag081
8 7 6 5
VCC 1Y 3A 2Y
Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
74LVC3G14 74LVC3G14
1A 1 8 VCC terminal 1 index area 1Y 1 VCC 8
7
1A
3Y
2
7
1Y
3A
2
6
3Y
2A
3
6
3A 2Y 3 4 5 2A
GND
GND
4
5
2Y
001aag082
001aab834
Transparent top view
Transparent top view
Fig 5. Pin configuration SOT833-1 (XSON8)
Fig 6. Pin configuration SOT902-1 (XQFN8)
7.2 Pin description
Table 3. Pin description Pin SOT505-2, SOT765-1 and SOT833-1 nA nY GND VCC 1, 3, 6 7, 5, 2 4 8 SOT902-1 7, 5, 2 1, 3, 6 4 8 data input data output ground (0 V) supply voltage Description Symbol (n = 1, 2, 3)
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
8. Functional description
Table 4. Input nA L H
[1] H = HIGH voltage level; L = LOW voltage level
Function table [1] Output nY H L
9. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC IGND Ptot Tstg
[1] [2] [3]
Parameter supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current total power dissipation storage temperature
Conditions VI < 0 V
[1]
Min -0.5 -50 -0.5 [1][2] [1][2]
Max +6.5 +6.5 50 VCC + 0.5 +6.5 50 100 250 +150
Unit V mA V mA V V mA mA mA mW C
VO > VCC or VO < 0 V Active mode Power-down mode VO = 0 V to VCC
-0.5 -0.5 -100
Tamb = -40 C to +125 C
[3]
-65
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. For TSSOP8 and VSSOP8 packages: above 110 C the value of Ptot derates linearly with 8.0 mW/K. For XSON8 and XQFN8 packages: above 45 C the value of Ptot derates linearly with 2.4 mW/K.
10. Recommended operating conditions
Table 6. Symbol VCC VI VO Tamb Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature Active mode Power-down mode; VCC = 0 V Conditions Min 1.65 0 0 0 -40 Typ Max 5.5 5.5 VCC 5.5 +125 Unit V V V V C
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
11. Static characteristics
Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +85 C VOH HIGH-level output voltage VI = VIH or VIL IO = -100 A; VCC = 1.65 V to 5.5 V IO = -4 mA; VCC = 1.65 V IO = -8 mA; VCC = 2.3 V IO = -12 mA; VCC = 2.7 V IO = -24 mA; VCC = 3.0 V IO = -32 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 5.5 V IO = 4 mA; VCC = 1.65 V IO = 8 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 24 mA; VCC = 3.0 V IO = 32 mA; VCC = 4.5 V II IOFF ICC ICC CI VOH input leakage current power-off leakage current supply current additional supply current input capacitance HIGH-level output voltage VI = 5.5 V or GND; VCC = 0 V to 5.5 V VI or VO = 5.5 V; VCC = 0 V VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V VCC = 3.3 V; VI = GND to VCC VI = VIH or VIL IO = -100 A; VCC = 1.65 V to 5.5 V IO = -4 mA; VCC = 1.65 V IO = -8 mA; VCC = 2.3 V IO = -12 mA; VCC = 2.7 V IO = -24 mA; VCC = 3.0 V IO = -32 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 5.5 V IO = 4 mA; VCC = 1.65 V IO = 8 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 24 mA; VCC = 3.0 V IO = 32 mA; VCC = 4.5 V II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V 0.1 0.7 0.45 0.6 0.8 0.8 20 V V V V V V A VCC - 0.1 0.95 1.7 1.9 2.0 3.4 V V V V V V 0.1 0.1 0.1 5 3.5 0.1 0.45 0.3 0.4 0.55 0.55 5 10 10 500 V V V V V V A A A A pF VCC - 0.1 1.2 1.9 2.2 2.3 3.8 V V V V V V Conditions Min Typ [1] Max Unit
Tamb = -40 C to +125 C
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Product data sheet
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
Table 7. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter IOFF ICC ICC power-off leakage current supply current additional supply current Conditions VI or VO = 5.5 V; VCC = 0 V VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V Min Typ [1] Max 20 40 5000 Unit A A A
[1]
All typical values are measured at maximum VCC and Tamb = 25 C.
Table 8. Transfer characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 8 Symbol Parameter VT+ positive-going threshold voltage Conditions see Figure 9 and Figure 10 VCC = 1.8 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V VT- negative-going threshold voltage see Figure 9 and Figure 10 VCC = 1.8 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V VH [2] hysteresis voltage see Figure 9, Figure 10 and Figure 11 VCC = 1.8 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V
[1] [2] All typical values are measured at Tamb = 25 C VH = VT+ - VT-
-40 C to +85 C Min 0.70 1.00 1.30 1.90 2.20 0.25 0.40 0.60 1.00 1.20 Typ[1] 1.10 1.40 1.76 2.47 2.91 0.61 0.80 1.04 1.55 1.86 Max 1.50 1.80 2.20 3.10 3.60 0.90 1.15 1.50 2.00 2.30
-40 C to +125 C Min 0.70 1.00 1.30 1.90 2.20 0.25 0.40 0.60 1.00 1.20 Max 1.70 2.00 2.40 3.30 3.80 1.10 1.35 1.70 2.20 2.50
Unit
V V V V V V V V V V
0.15 0.25 0.40 0.60 0.70
0.49 0.60 0.73 0.92 1.02
1.00 1.10 1.20 1.50 1.70
0.15 0.25 0.40 0.60 0.70
1.20 1.30 1.40 1.70 1.90
V V V V V
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Product data sheet
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
12. Dynamic characteristics
Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter tpd Conditions
[2]
-40 C to +85 C Min Typ[1] 4.2 3.0 3.8 3.2 2.4 18.1 Max 11.0 6.5 7.0 6.0 4.3 -
-40 C to +125 C Min 1.0 0.5 0.5 0.5 0.5 Max 12.0 7.2 7.7 6.7 4.7 -
Unit
propagation delay nA to nY; see Figure 7 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V
1.0 0.5 0.5 0.5 0.5
[3]
ns ns ns ns ns pF
CPD
power dissipation capacitance
VI = GND to VCC; VCC = 3.3 V
-
[1] [2] [3]
Typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. tpd is the same as tPLH and tPHL. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of outputs.
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Product data sheet
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
13. Waveforms
VI nA input GND t PHL VOH nY output VOL VM VM
mna344
VM
VM
t PLH
Measurement points are given in Table 10. VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. The data input (nA) to output (nY) propagation delays Table 10. VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V Measurement points Input VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V 0.5 x VCC Output VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V 0.5 x VCC
VEXT VCC VI VO DUT
RT CL RL RL
G
mna616
Test data is given in Table 11. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times.
Fig 8. Load circuitry for switching times Table 11. VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V
74LVC3G14_5
Test data Input VI VCC VCC 2.7 V 2.7 V VCC tr = t f 2.0 ns 2.0 ns 2.5 ns 2.5 ns 2.5 ns Load CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1 k 500 500 500 500 VEXT tPLH, tPHL open open open open open
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Supply voltage
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
14. Waveforms transfer characteristics
VO
VT+ VI VT- VH
VO VH VT- VT+ VI
mna207 mna208
VT+ and VT- limits at 70 % and 20 %.
Fig 9. Transfer characteristic
Fig 10. Definition of VT+, VT- and VH
ICC (mA)
14 12 10
mdb627
8 6
4 2 0 0 0.5 1 1.5 VI (V) 2
VCC = 3.0 V
Fig 11. Typical transfer characteristics
15. Application information
The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula: Padd = fi x (tr x ICC(AV) + tf x ICC(AV)) x VCC where: Padd = additional power dissipation (W); fi = input frequency (MHz); tr = input rise time (ns); 10 % to 90 %; tf = input fall time (ns); 90 % to 10 %; ICC(AV) = average additional supply current (A). ICC(AV) differs with positive or negative input transitions, as shown in Figure 12.
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Product data sheet
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
An example of a relaxation circuit using the 74LVC3G14 is shown in Figure 13.
50 ICC(AV) (mA) 40
mnb086
(1)
30
20
(2)
10
0 2 3 4 5 VCC (V) 6
Linear change of VI between 0.8 V to 2.0 V. All values given are typical unless otherwise specified. (1) Positive-going edge. (2) Negative-going edge.
Fig 12. ICC(AV) as a function of VCC
R
C
mna035
1 1 f = --- --------------------T 0.8 x RC Fig 13. Relaxation oscillator
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
16. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2
D
E
A
X
c y HE vMA
Z
8
5
A pin 1 index
A2 A1
(A3)
Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 8 0
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16
Fig 14. Package outline SOT505-2 (TSSOP8)
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A X
c y HE vMA
Z
8
5
Q A pin 1 index A2 A1 (A3) Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 8 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION
ISSUE DATE 02-06-07
Fig 15. Package outline SOT765-1 (VSSOP8)
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
1
2
3
b 4 4x L
(2)
L1
e
8 e1
7 e1
6 e1
5
8x
(2)
A
A1 D
E
terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 2.0 1.9 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm
Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT833-1 REFERENCES IEC --JEDEC MO-252 JEITA --EUROPEAN PROJECTION ISSUE DATE 04-07-22 04-11-09
Fig 16. Package outline SOT833-1 (XSON8)
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
XQFN8: plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm
SOT902-1
D terminal 1 index area
B
A
E
A A1
detail X
L1 L
e
4
e v M C A B w M C
5
C y1 C y
3
metal area not for soldering
2 6
b
e1
e1
7 1
terminal 1 index area
8
X
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 0.05 0.00 b 0.25 0.15 D 1.65 1.55 E 1.65 1.55 e 0.55 e1 0.5 L 0.35 0.25 L1 0.15 0.05 v 0.1 w 0.05 y 0.05 y1 0.05
OUTLINE VERSION SOT902-1
REFERENCES IEC --JEDEC MO-255 JEITA ---
EUROPEAN PROJECTION
ISSUE DATE 05-11-16 05-11-25
Fig 17. Package outline SOT902-1 (XQFN8)
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Product data sheet
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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
17. Abbreviations
Table 12. Acronym CMOS DUT ESD HBM MM TTL Abbreviations Description Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic
18. Revision history
Table 13. Revision history Release date 20071005 Data sheet status Product data sheet Change notice Supersedes 74LVC3G14_4 Document ID 74LVC3G14_5 Modifications: 74LVC3G14_4 74LVC3G14_3 74LVC3G14_2 74LVC3G14_1
*
In Section 11 "Static characteristics", changed conditions for input leakage and supply current. Product data sheet Product data sheet Product data sheet Product data sheet 74LVC3G14_3 74LVC3G14_2 74LVC3G14_1 -
20070314 20050131 20041027 20040510
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Triple inverting Schmitt trigger with 5 V tolerant input
19. Legal information
19.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
19.3 Disclaimers
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19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
20. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
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Triple inverting Schmitt trigger with 5 V tolerant input
21. Contents
1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 12 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Waveforms transfer characteristics . . . . . . . . . 9 Application information. . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 5 October 2007 Document identifier: 74LVC3G14_5

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